4.1.1 methodology For all described multipliers as much as possible the same methodology has been used. ... The multiplier VHDL codes have been synthesized using the Cadence Synergy synthesis tool. ... The used multiplier core will be the same as for the models described in section 2 (Booth encoding, Wallace Treeanbsp;...
|Title||:||2nd Workshop on Libraries, Component Modeling, and Quality Assurance|
|Author||:||Universidad de Cantabria|
|Publisher||:||Ed. Universidad de Cantabria - 1997|