Improve design efficiency and reduce costs with this practical guide to formal and simulation-based functional verification. Giving you a theoretical and practical understanding of the key issues involved, expert authors including Wayne Wolf and Dan Gajski explain both formal techniques (model checking, equivalence checking) and simulation-based techniques (coverage metrics, test generation). You get insights into practical issues including hardware verification languages (HVLs) and system-level debugging. The foundations of formal and simulation-based techniques are covered too, as are more recent research advances including transaction-level modeling and assertion-based verification, plus the theoretical underpinnings of verification, including the use of decision diagrams and Boolean satisfiability (SAT).In what follows, combinational circuits are assumed, but the same ideas can be extended to sequential circuits.  To compute an ... The first copy represents the circuit without the fault, and is referred to as the good circuit. The second copy anbsp;...
|Title||:||Practical Design Verification|
|Author||:||Dhiraj K. Pradhan, Ian G. Harris|
|Publisher||:||Cambridge University Press - 2009-06-11|